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Basic nand gate sr latch circuit
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![Real-life state diagram for R-S latch](https://i2.wp.com/courses.cs.washington.edu/courses/cse370/97au/admin/Slides/Week6Lecture2/img004.gif)
Gated d latch timing diagram
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Sr latch. an sr latch consists of two nand gates and is commonly used
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![12+ Sr Latch Diagram | Robhosking Diagram](https://i2.wp.com/media.cheggcdn.com/study/83e/83e7ac37-37d4-47cc-8f3c-a10a5bddbdba/14584-3-7IE1.png)
![PPT - Sequential Circuits PowerPoint Presentation, free download - ID](https://i2.wp.com/image5.slideserve.com/9649923/sr-latch-state-diagram-l.jpg)
![Solved 4 Latch I. Given a SR latch of 2 NOR gates (slide 12 | Chegg.com](https://i2.wp.com/d2vlcm61l7u1fs.cloudfront.net/media/804/804be4c1-8319-4eb6-bef9-751d2b376f96/phplwMoBj.png)
![Gated D Latch Timing Diagram](https://i2.wp.com/schematron.org/image/gated-d-latch-timing-diagram-3.png)
![Basic NAND Gate SR Latch Circuit](https://i2.wp.com/www.bristolwatch.com/ele3/images/7400.jpg)
![SR LATCH WITH CONTROLLED INPUT - YouTube](https://i.ytimg.com/vi/2Ickecd05Ow/maxresdefault.jpg)
![19b SR Latches by Using NOR-NAND Gates | SR latch with Control Input](https://i.ytimg.com/vi/Qp5cKSi-TRk/maxresdefault.jpg)
![S-r Latch Timing Diagram - malaydanan](https://i2.wp.com/d2vlcm61l7u1fs.cloudfront.net/media/30f/30f495c4-e3ba-4c4f-8ea4-0f5b5c7727c2/phpRn8eGf.png)
![Latches | CircuitVerse](https://i2.wp.com/learn.circuitverse.org/assets/images/sr_latch.jpg)
![LogicBlocks Experiment Guide - SparkFun Learn](https://i2.wp.com/cdn.sparkfun.com/r/600-600/assets/learn_tutorials/2/1/6/32-sr-states.png)